Notice Board :

Call for Paper
Vol. 10 Issue 6

Submission Start Date:
June 1, 2024

Acceptence Notification Start:
June 10, 2024

Submission End:
June 15, 2024

Final MenuScript Due:
June 25, 2024

Publication Date:
June 30, 2024


                         Notice Board: Call for PaperVol. 10 Issue 6      Submission Start Date: June 1, 2024      Acceptence Notification Start: June 10, 2024      Submission End: June 15, 2024      Final MenuScript Due: June 25, 2024      Publication Date: June 30, 2024




Volume IV Issue XI

Author Name
Bhimraj Verma, Ashish Ranjan
Year Of Publication
2018
Volume and Issue
Volume 4 Issue 11
Abstract
The goal of this project is reviewing the past work of automatic meter reading and improve the existing system to an Internet of things using MQTT Protocol. The system will be read power consumption through help of current sensor, process it and calculates power consumption and send it to server. It is a combination of a current sensor and a GSM (Global System for Mobile Communications) module. The module chosen is having capability of doing high speed data processing and complete stack of GSM communication. By the virtue of blooming automation industry and wireless connectivity, all the devices within the home can be connected. This improves the comfort, energy efficiency, indoor security, cost savings of the home. Small and constrained embedded devices are used to remotely monitor the conditions within home and control the home appliances. In such case, power consumption and network bandwidth become a major concern. We need a low power device that transmits messages through a less
PaperID
2018/IJRRETAS/11/2018/37674

Author Name
Mayuri Patil, Ashish Ranjan
Year Of Publication
2018
Volume and Issue
Volume 4 Issue 11
Abstract
This project is about the design and implementation of a Multi-channel UART with automatic baud rate detection. To meet modern complex control systems communication demands, the project presents a multi-channel UART controller based on FIFO (First In First Out) technique and FPGA technology (Field Programmable Gate Array). It is designed with FIFO circuit block and UART (Universal Asynchronous Receiver Transmitter) circuit block within FPGA to implement communication in modern complex control systems quickly and effectively.
PaperID
2018/IJRRETAS/11/2018/37673

Author Name
Jyoti Choyal , Ashish Ranjan
Year Of Publication
2018
Volume and Issue
Volume 4 Issue 11
Abstract
The goal of this project is to use machine learning for image detection. Object detection suggests that finding the situation of the item and recognizing what it's. The techniques used for the item detection measure feature matching rule, pattern comparison and boundary detection. The feature-matching rule is employed to seek out the most effective matching object within the knowledge domain and to implement the reconstruction of the item recognized.
PaperID
2018/IJRRETAS/11/2018/37672